and Quality for
all Chip Designs.
Why is full-chip electrical verification essential?
100% exhaustive and accurate
- Detects all errors thanks to an electrically-accurate analysis at transistor-level on the full IC
- Built from the ground up to remove the burden of false errors
- Covers all possible power states in a single run
- Enables focusing on correcting real errors rather than filtering out false errors
Easy to use for all IC designers
- Minimizes setup effort thanks to Aniah’s smart analysis algorithm
- Provides the benefits of formal verification at transistor level to analog and digital design engineers
- Efficient results analysis interface including seamless integration with design tools for cross-probing
Unique error detection capacity
Our error detection capacity is unparalleled by both Spice and static ERC :
- Conditional High-Impedance in large-scale VLSI, including non-systematic errors
- Reliability and electrical overstress errors in ICs with complex HV/LV voltages mix
- Detection capacity is independent of IC scale – up to one billion of transistors
A smart circuit analysis algorithm to unleash the potential of vectorless static transistor-level verification
in 2022, Q4
ANIAH and PROPHESEE Announce Collaboration to strengthen their technological synergies. PARIS, February 8, 2024 PROPHESEE, the creator of the world’s most advanced and efficient neuromorphic vision systems, in his constant search for operational excellence, has...
Aniah celebrates France 2030 recognition and affirms its commitment to contributing to the independence and resilience of the European microelectronics industry. Grenoble, January 30, 2023, Aniah is delighted to share the double recognition from the French...
Aniah is proud to announce her membership of the AENEAS association (https://aeneas-office.org), allowing us to integrate into this unique ecosystem which bring in together more than 550 members: SMEs, Research Institutes and Universities, Large Industry from the...