Productivity
and Quality for
all Chip Designs.

Why is full-chip electrical verification essential?

Semiconductor manufacturers suffer from errors in their designs that cannot be detected before the silicon validation stage, at a very high cost and risk to the project’s time-to-market. Existing EDA solutions are either accurate but limited in capacity or, due to oversimplification, unable to identify all errors. Design best-practices reduce the problem, but cannot solve it completely. The financial impact of these errors can reach hundreds of millions of dollars in the event of a product recall. It will also seriously damage a company’s reputation.
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100% exhaustive and accurate

Reliability
  • Detects all errors thanks to an electrically-accurate analysis at transistor-level on the full IC
  • Built from the ground up to remove the burden of false errors
  • Covers all possible power states in a single run
  • Enables focusing on correcting real errors rather than filtering out false errors

Easy to use for all IC designers

Use
  • Minimizes setup effort thanks to Aniah’s smart analysis algorithm
  • Provides the benefits of formal verification at transistor level to analog and digital design engineers
  • Efficient results analysis interface including seamless integration with design tools for cross-probing

Unique error detection capacity

Accuracy
Aniah’s Smart Network Analysis reduces the number of false errors by a factor of 100-1000x. It can accurately model voltages in complex circuitry and opens new areas for reliability verification in complex ICs. Our Pseudo-Spice Engine detects errors that occur only in specific conditions with the support of 100% of circuit topologies. Its detection capacity is unique in the industry for errors that Spice simulators cannot detect.

Our error detection capacity is unparalleled by both Spice and static ERC :

  • Conditional High-Impedance in large-scale VLSI, including non-systematic errors
  • Reliability and electrical overstress errors in ICs with complex HV/LV voltages mix
  • Detection capacity is independent of IC scale – up to one billion of transistors
“We have been working for more than two years with Aniah and its tool promises to revolutionize IC design thanks to a disruptive approach to the crucial verification stage”

Mourad Djouder

Manager PDK and Design Flows
at STMicroelectronics.

About us

A smart circuit analysis algorithm to unleash the potential of vectorless static transistor-level verification

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Founded in

2019
in Q4

Total funding

9.8 M€
in 2024, Q4

Team

22 people
and growing!

International

3 agencies
France, Taiwan, USA

Our stories

The Aniah 2024 team-building day

The Aniah 2024 team-building day

Nov 8, 2024 | ,

November 8th, Aniah joined the Vercors plateau and enjoyed a memorable day of team building, reinforcing the leadership of each team member through various activities to bring real strength to the OneCheck project and develop our future ambitions.

Aniah announces the release of OneCheck V3.0

Aniah announces the release of OneCheck V3.0

Jul 15, 2024 |

We’re please to announce that the new version of OneCheck is here !   The 3.0 version focuses on :   SmartClustering by root cause:   Smart algorithms categorize issues by priority, then cluster them by underlying root causes  Description of the error is made in...

all our stories

Join Our Team.

Aniah is an ambitious company working on the development of a unique industry tool that leverages advanced high-performance-computing techniques for large-scale circuit analysis. We are a company on a human scale, with simple and sincere relationships. Dynamism, high standards, benevolence, and the right to make mistakes are the guiding principles of the management team.
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